The present invention relates generally to electronic circuits having multiple power supplies. More specifically, but without limitation thereto, the present invention relates to a method of placing a level shifter in a known state if the output voltage supply is powered on when the input voltage supply is not powered on.
In electronic circuit design, a level shifter is often used to convert a digital signal from a voltage level that switches between an input voltage and ground to another voltage level that switches between an output voltage and ground. For example, the input voltage may be 5 volts, and the output voltage may be 15 volts.
A problem arises when the input voltage supply that powers the circuit generating the digital signal is not powered on when the output voltage supply that powers the circuit receiving the level shifted digital signal is powered on. In this situation, the state of the level shifter is indeterminate, and may result in potentially damaging currents if the end user of the digital signal does not provide protection for powering up the voltage supplies out of sequence.
The present invention advantageously addresses the problems above as well as other problems by providing a method of placing a level shifter in a pre-selected state if the output voltage supply is powered on when the input voltage supply is not powered on.
In one embodiment of the present invention, a method of power sequence protection for a level shifter includes the steps of placing the level shifter in a pre-selected state if an output voltage supply is powered on when an input voltage supply is not powered on; and releasing the level shifter from the pre-selected state when the input voltage supply is powered on.
In another embodiment of the present invention, a power sequence protection circuit includes a latch electrically coupled to an input voltage supply and an output voltage supply and a switch electrically coupled to the latch wherein the switch has a first state for holding the level shifter in a pre-selected state if the output voltage supply is powered on when the input voltage supply is not powered on and a second state for releasing the level shifter from the pre-selected state to follow transitions of an input signal when the input voltage supply is powered on.